Fast timing simulation of embedded software based on its target architecture

Aim of this project is to carry out research work and prototypical implementations to support the client in the development of a simulation environment for embedded software that allows the inclusion of non-functional properties -in particular the consideration of timing behavior- of the underlying processor architecture.

The aim is to develop new methods that simulate the timing behavior of embedded software components during execution on a given microprocessor with sufficient precision in simulation, without having to accept a significant reduction in simulation performance. The to be developed approach is intended to be applied on both the source-code and the executable binary-code level. The timing behavior of the underlying processor architecture should be characterized on the basis of measured traces or abstract processor models and directly included in the simulation process.