Publikationen

 Alle Publikationen im BibTex-Format

    2012

      Dezember 2012
      • S. Eisenhardt
          Vorausschauende Rekonfiguration dynamisch rekonfigurierbarer Prozessoren in einem System on Chip
        Dissertation UniversitĂ€t TĂŒbingen

      2010

        Februar 2010
        • S. Eisenhardt, T. Schweizer, J. Oliveira, T. Kuhn, W. Rosenstiel
           Dynamically Reconfigurable Systems - Architectures, Design Methods and Applications: Evaluation and Design Methods for Processor-Like Reconfigurable Architectures
          Springer

        2009

          Dezember 2009
          • S. Eisenhardt, T. Schweizer, A. Bernauer, T. Kuhn, W. Rosenstiel
             Prevention of Hot Spot Development on Coarse-Grained Dynamically Reconfigurable Architectures
            International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, Cancun, Mexico
          September 2009
          • J.Oliveira Filho, S. Masekowsky, T. Schweizer, W.Rosenstiel
             CGADL: an Architecture Description Language for Coarse-Grained Reconfigurable Arrays
            IEEE Transactions in Very Large Scale Integration Systems
          • T. Schweizer, J. Oliveira, T. Kuhn, W. Rosenstiel
             Low Energy Voltage Dithering in Dual VDD Circuits
            Power and Timing Modeling, Optimization and Simulation, PATMOS, Delft, Netherlands
          MĂ€rz 2009
          • S. Eisenhardt, J. Oliveira, T. Kuhn, W. Rosenstiel
             Speculative Configuration Prefetching for Multi-Context Architectures
            Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI), Okinawa, Japan

          2008

            Dezember 2008
            • Oliveira, Kuhn, Rosenstiel
               Evaluating the Impact of Customized Instruction Set on Coarse Grained Reconfigurable Arrays
              Proceedings of the International Conference on Field-Programmable Technology (ICFPT), Taiwan
            • S. Eisenhardt, T. Oppold, T. Schweizer, W. Rosenstiel
               Optimizing Partial Reconfiguration of Multi-Context Architectures
              International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, Cancun, Mexico
            September 2008
            • S. Eisenhardt, T. Schweizer, J. Oliveira, T. Oppold, W. Rosenstiel, A. Thomas, J. Becker, F. Hannig, D. Kissler, H. Dutta, J. Teich, H. Hinkelmann, P. Zipf, M. Glesner
               SPP1148 Booth: Coarse-Grained Reconfiguration
              In Proceedings of the International Conference on Field Programmable Logic and Applications (FPL), p.349, Heidelberg, Germany
            Juli 2008
            • T. Oppold
                Entwurf und Bewertung von Architekturen dynamisch rekonfigurierbarer Prozessoren
              Eberhard-Karls-UniversitĂ€t TĂŒbingen

            2007

              Oktober 2007
              • J. O. Filho, S. Masekowsky, T. Schweizer, W. Rosenstiel
                  An Architecture Description Language for coarse-grained Reconfigurable Arrays
                International Conference on Hardware/Software Codesign and System Synthesis (CODES) - Workshop on Application Specific Processors (WASP), Salzburg, Austria
              Publikationen ohne Monatsangabe 2007
              • T. Oppold, T. Schweizer, J. F. Oliveira, S. Eisenhardt, W. Rosenstiel
                   CRC - Concepts and Evaluation of Processor-Like Reconfigurable Archtitectures
                it - Information Technology, DOI: 10. 1524/itit, 49. 3. 157, Vol.49(3)
              • M. Rullmann, S. Siegel, R. Merker, J. O. Filho, T. Schweizer, T. Oppold, W. Rosenstiel
                  Efficient Mapping and Functional Verification of Parallel Algorithms on a Multi-Context Reconfigurable Architecture
                20. International Conference on Architecture of Computing Systems (ARCS), Workshop on Dynamically Reconfigurable Systems (DRS), ZĂŒrich, Schweiz
              • T. Schweizer, T. Oppold, J. O. Filho, S. Eisenhardt, K. Blocher, W. Rosenstiel
                  Exploiting Slack Time in Dynamically Reconfigurable Processor Architectures
                International Conference on Field Programmable Technology (ICFPT), Kitakyushu, Japan
              • T. Oppold, S. Eisenhardt, W. Rosenstiel
                  Optimization of Area and Performance by Processor-Like Reconfiguration
                International Parallel and Distributed Processing Symposium (IPDPS) - Reconfigurable Architectures Workshop (RAW), Long Beach, USA

              2006

                September 2006
                • J. O. Filho, T. Schweizer, T. Oppold, T. Kuhn, W. Rosenstiel,
                    Tuning Coarse-Grained Reconfigurable Architectures towards an Application Domain
                  3. International Conference on Reconfigurable Computing and FPGAs (ReConfig), p.71-77, San Luis Potosi, Mexiko
                Publikationen ohne Monatsangabe 2006
                • T. Oppold, S. Eisenhardt, W. Rosenstiel
                    Design and Validation of Execution Schemes for Dynamically Reconfigurable Architectures
                  International Conference on Field Programmable Technology (FPT), Bangkok, Thailand
                • T. Oppold, W. Rosenstiel
                    Evaluation and Design of Processor-Like Reconfigurable Architectures
                  International Conference on Field Programmable Logic and Applications (FPL), Madrid, Spain
                • T. Oppold, T. Schweizer, J. F. Oliveira, S. Eisenhardt, T. Kuhn, W. Rosenstiel
                    Execution Schemes for Dynamically Reconfigurable Architectures
                  Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI), Nagoya, Japan
                • J. A. Brenner, J. C. v. d. Veen, S. P. Fekete, J. O. Filho, W. Rosenstiel
                    Optimal Simultaneous Scheduling, Binding and Routing for Processor-Like Reconfigurable Architectures
                  Proceedings of the 17. International Conference on Field Programmable Logic and Applications, Spanien

                2005

                • T. Oppold, T. Schweizer, T. Kuhn, W. Rosenstiel, U. Kanus, W. Straßer
                    Evaluation of Ray Casting on Processor-Like Reconfigurable Architectures
                  International Conference on Field Programmable Logic and Applications (FPL), Tampere, Finland
                • T. Schweizer, J. F. Oliveira, T. Oppold, T. Kuhn, W. Rosenstiel
                    Evaluation of Temporal-Spatial Voltage Scaling for Processor-Like Reconfigurable Architectures
                  Euro DesignCon, Munich, Germany

                2004

                • T. Oppold, T. Schweizer, T. Kuhn, W. Rosenstiel
                    A Design Environment for Processor-Like Reconfigurable Hardware
                  IEEE International Conference on Parallel Computing in Electrical Engineering (PARELEC), Dresden, Germany
                • T. Oppold, T. Schweizer, T. Kuhn, W. Rosenstiel
                    A New Design Approach for Processor-Like Reconfigurable Hardware
                  Euro DesignCon, MĂŒnchen
                • T. Oppold, T. Schweizer, T. Kuhn, W. Rosenstiel
                    Cost Functions for the Design of Dynamically Reconfigurable Processor Architectures
                  Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI), Kanazawa, Japan
                • C. Schulz-Key, M. Winterholer, T. Schweizer, T. Kuhn, , W. Rosenstiel
                    Object-Oriented Modeling and Synthesis of SystemC Specifications
                  Asia South Pacific Design Automation Conference (ASPDAC), Yokohama, Japan

                2002

                • T. Oppold, W. Rosenstiel
                    IP Design for Dynamically Reconfigurable SoCs
                  International Workshop on IP-Based SoC Design, Grenoble, Frankreich

                2001

                • T. Kuhn, T. Oppold, M. Winterholer, W. Rosenstiel, M. Edwards, , Y. Kashai
                    A Framework for Object Oriented Hardware Specification, Verification, and Synthesis
                  38. Design Automation Conference (DAC), Las Vegas, USA
                • C. Schluz-Key, T. Kuhn, W. Rosenstiel
                   A Framework for System-Level Partitioning of Object-Oriented Specifications
                  Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI)
                • T. Kuhn, T. Oppold, C. Schulz-Key, M. Winterholer, W. Rosenstiel, M. Edwards, , Y. Kashai
                    Object Oriented Hardware Synthesis and Verification
                  14. International Symposium on System Synthesis (ISSS), Montréal, Québec, Kanada

                2000

                • T. Kuhn, C. Schluz-Key, W. Rosenstiel
                   Object Oriented Hardware Specification with Java
                  Workshop on Synthesis and System Integration of Mixed Technologies (SASIMI)

                1999

                • T. Kuhn, W. Rosenstiel, U. Kebschull
                   Beschreibung und Simulation von Hardware/Software-Systemen mit Java
                  GI/ITG/GMM Workshop, Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen
                • T. Kuhn, W. Rosenstiel, U. Kebschull
                   Description and Simulation of Hardware/Software Systems
                  36th Design Automation Conference (DAC)

                1998

                  MĂ€rz 1998
                  • T. Kuhn, W. Rosenstiel
                     Java Based Modeling And Simulation Of Digital Systems On Register Transfer Level
                    Proceedings of Workshop on System Design Automation (SDA), Dresden
                  Publikationen ohne Monatsangabe 1998
                  • T. Kuhn, W. Rosenstiel, U. Kebschull
                     Object Oriented Hardware Modeling and Simulation Based on Java
                    International Workshop on IP Based Synthesis and System Design , Grenoble